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From: Pascal Urien <pascal.urien@gmail.com>
Date: Fri, 29 Jul 2016 15:42:39 +0200
Message-ID: <CAEQGKXQBza8pO2ZjMNv9wH+icUDf_xEZ0bvE2h=vr51q7dMShg@mail.gmail.com>
To: Hannes Tschofenig <hannes.tschofenig@gmx.net>
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Archived-At: <https://mailarchive.ietf.org/arch/msg/ace/VR5ThNgDF3vhWjCC8sgySFYuBD8>
Cc: Michael StJohns <mstjohns@comcast.net>, "ace@ietf.org" <ace@ietf.org>,
 Somaraju Abhinav <abhinav.somaraju@tridonic.com>
Subject: Re: [Ace] on signature verification times for sec192r1
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--001a113ddd829f8eb70538c66ccb
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This data sheet from NXP gives many figures for coprocessor processing
 performances (including ECC 192 bits)

http://www.nxp.com/documents/line_card/75016728.pdf

Rgs


2016-07-25 20:45 GMT+02:00 Pascal Urien <pascal.urien@gmail.com>:

> Hi Hannes
>
>
> 2016-07-25 19:16 GMT+02:00 Hannes Tschofenig <hannes.tschofenig@gmx.net>:
>
>> Hi Pascal,
>>
>> I guess you are saying that the performance of the verify operation is
>> 60ms + the hash needed over the actual message (which is 3.5 msec for a
>> 64 byte block).
>>
>>
> That 's right. A few ms per bloc is a common figure
>
>
>> In another paper I have seen that some hardware crypto chips have a
>> fairly slow interface and that has to be taken into account as well. Is
>> this an issue with this smart card? What is your experience there?
>>
>
> I have not a lot of data for ECC processing in smartcards, because of the
> difficulty in finding this type of component with ECC support.
>
> Neverless ECC is usually faster than RSA
>
> An other issue is to estimate the cost of countermeasures; computing
> performance is not always the first cobjective of crypto processors
> according to the EAL evaluation needed
>
> Let's say there is a balance between the sign/verify cost and the function
> computing
>
> Rgs
>
>
>> Ciao
>> Hannes
>>
>> On 07/25/2016 12:28 PM, Pascal Urien wrote:
>> > Hi Abhinav
>> >
>> > The extra time (2ms/bloc)  comes from the hash procedure (sha1 in the
>> > example) that works with 64 bytes blocs
>> >
>> > Rgs
>> >
>> > Pascal
>> >
>> > 2016-07-25 12:04 GMT+02:00 Somaraju Abhinav
>> > <abhinav.somaraju@tridonic.com <mailto:abhinav.somaraju@tridonic.com>>:
>> >
>> >     Hi Pascal,____
>> >
>> >     __ __
>> >
>> >     Thanks for the information. Could you please explain what is
>> >     nb_bloc_512bits?____
>> >
>> >     __ __
>> >
>> >     Regards,____
>> >
>> >     Abhinav____
>> >
>> >     __ __
>> >
>> >     *From:*Ace [mailto:ace-bounces@ietf.org
>> >     <mailto:ace-bounces@ietf.org>] *On Behalf Of *Pascal Urien
>> >     *Sent:* Sonntag, 24. Juli 2016 11:51
>> >     *To:* Michael StJohns <mstjohns@comcast.net
>> >     <mailto:mstjohns@comcast.net>>
>> >     *Cc:* ace@ietf.org <mailto:ace@ietf.org>
>> >     *Subject:* Re: [Ace] on signature verification times for
>> sec192r1____
>> >
>> >     __ __
>> >
>> >     I fully agree...____
>> >
>> >     __ __
>> >
>> >     J3A081M  can be found at 10$ over the WEB____
>> >
>> >     __ __
>> >
>> >     Futhermore this class of cheap device can process TLS or DTLS as
>> >     illustrated in____
>> >
>> >     __ __
>> >
>> >
>> https://tools.ietf.org/html/draft-urien-uta-tls-dtls-security-module-00____
>> >
>> >     __ __
>> >
>> >     They could be used for numerous applications in the IoT____
>> >
>> >     __ __
>> >
>> >     Rgs____
>> >
>> >     __ __
>> >
>> >     Pascal____
>> >
>> >     __ __
>> >
>> >     __ __
>> >
>> >     2016-07-23 23:59 GMT+02:00 Michael StJohns <mstjohns@comcast.net
>> >     <mailto:mstjohns@comcast.net>>:____
>> >
>> >         On 7/23/2016 11:10 AM, Pascal Urien wrote:____
>> >
>> >             Hi All____
>> >
>> >             __ __
>> >
>> >             J3A081M is a javacard device from NXP____
>> >
>> >             __ __
>> >
>> >             The micocontroller should be the P5CD081V1A, which comprises
>> >             a crypto processor____
>> >
>> >
>> >         There's a number of these from a number of vendors.  I'd
>> >         actually look at the A7xxx series of chips as they're designed
>> >         to be embeddable.  I've become a big fan of javacard style
>> >         solutions over the years.
>> >
>> >         In any event, the number of relatively inexpensive public key
>> >         crypto accelerator chips (e.g. googl for "secure authentication
>> >         chips") is greater than zero and continues to climb.  And for
>> >         not a lot of money.  Estimating what from prices on Digikey, I'd
>> >         think something less than $.50 for Quantity large as of today
>> >         and half that or less in 1-2 years as its gets bundled into the
>> >         "Swiss Army Knife" style of process (e.g. support for wireless
>> >         900mhz plus ... plus ... plus ... plus security...) (google for
>> >         iot module secure element 900mhz for example).
>> >
>> >         Later, Mike
>> >
>> >
>> >
>> >
>> >         ____
>> >
>> >             __ __
>> >
>> >             The performances with the curve secp192r1 are the following
>> >             (for ECDSA + SHA1)____
>> >
>> >             __ __
>> >
>> >             Sign    = 40ms +  nb_bloc_512bits x 3.5 ms____
>> >
>> >             Verify  = 60ms  + nb_bloc_512bits x 3,5 ms____
>> >
>> >             __ __
>> >
>> >             __ __
>> >
>> >             By the way this chip has enough crypto ressouces for
>> >             processing TLS or DTLS____
>> >
>> >             __ __
>> >
>> >             Rgs____
>> >
>> >             __ __
>> >
>> >             Pascal____
>> >
>> >             __ __
>> >
>> >             ___________________________________________________
>> >
>> >             Ace mailing list____
>> >
>> >             Ace@ietf.org <mailto:Ace@ietf.org>____
>> >
>> >             https://www.ietf.org/mailman/listinfo/ace____
>> >
>> >         __ __
>> >
>> >
>> >         _______________________________________________
>> >         Ace mailing list
>> >         Ace@ietf.org <mailto:Ace@ietf.org>
>> >         https://www.ietf.org/mailman/listinfo/ace____
>> >
>> >     __ __
>> >
>> >     ________________________________________________________ The
>> >     contents of this e-mail and any attachments are confidential to the
>> >     intended recipient. They may not be disclosed to or used by or
>> >     copied in any way by anyone other than the intended recipient. If
>> >     this e-mail is received in error, please immediately notify the
>> >     sender and delete the e-mail and attached documents. Please note
>> >     that neither the sender nor the sender's company accept any
>> >     responsibility for viruses and it is your responsibility to scan or
>> >     otherwise check this e-mail and any attachments.
>> >
>> >
>> >
>> >
>> > _______________________________________________
>> > Ace mailing list
>> > Ace@ietf.org
>> > https://www.ietf.org/mailman/listinfo/ace
>> >
>>
>>
>

--001a113ddd829f8eb70538c66ccb
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: quoted-printable

<div dir=3D"ltr">This data sheet from NXP gives many figures for coprocesso=
r processing =C2=A0performances (including ECC 192 bits)<div><br></div><div=
><a href=3D"http://www.nxp.com/documents/line_card/75016728.pdf">http://www=
.nxp.com/documents/line_card/75016728.pdf</a><br></div><div><br></div><div>=
Rgs</div><div><br></div></div><div class=3D"gmail_extra"><br><div class=3D"=
gmail_quote">2016-07-25 20:45 GMT+02:00 Pascal Urien <span dir=3D"ltr">&lt;=
<a href=3D"mailto:pascal.urien@gmail.com" target=3D"_blank">pascal.urien@gm=
ail.com</a>&gt;</span>:<br><blockquote class=3D"gmail_quote" style=3D"margi=
n:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir=3D"ltr">=
Hi Hannes<div><br></div><div class=3D"gmail_extra"><br><div class=3D"gmail_=
quote"><span class=3D"">2016-07-25 19:16 GMT+02:00 Hannes Tschofenig <span =
dir=3D"ltr">&lt;<a href=3D"mailto:hannes.tschofenig@gmx.net" target=3D"_bla=
nk">hannes.tschofenig@gmx.net</a>&gt;</span>:<br><blockquote class=3D"gmail=
_quote" style=3D"margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left=
-style:solid;border-left-color:rgb(204,204,204);padding-left:1ex">Hi Pascal=
,<br>
<br>
I guess you are saying that the performance of the verify operation is<br>
60ms + the hash needed over the actual message (which is 3.5 msec for a<br>
64 byte block).<br>
<br></blockquote><div><br></div></span><div>That &#39;s right. A few ms per=
 bloc is a common figure</div><span class=3D""><div>=C2=A0</div><blockquote=
 class=3D"gmail_quote" style=3D"margin:0px 0px 0px 0.8ex;border-left-width:=
1px;border-left-style:solid;border-left-color:rgb(204,204,204);padding-left=
:1ex">
In another paper I have seen that some hardware crypto chips have a<br>
fairly slow interface and that has to be taken into account as well. Is<br>
this an issue with this smart card? What is your experience there?<br></blo=
ckquote><div><br></div></span><div>I have not a lot of data for ECC process=
ing in smartcards, because of the difficulty in finding this type of compon=
ent with ECC support.</div><div><br></div><div>Neverless ECC is usually fas=
ter than RSA</div><div><br></div><div>An other issue is to estimate the cos=
t of countermeasures; computing performance is not always the first cobject=
ive of crypto processors according to the EAL evaluation needed</div><div><=
br></div><div>Let&#39;s say there is a balance between the sign/verify cost=
 and the function computing</div><div><br></div><div>Rgs</div><div><div cla=
ss=3D"h5"><div><br></div><blockquote class=3D"gmail_quote" style=3D"margin:=
0px 0px 0px 0.8ex;border-left-width:1px;border-left-style:solid;border-left=
-color:rgb(204,204,204);padding-left:1ex">
<br>
Ciao<br>
Hannes<br>
<span><br>
On 07/25/2016 12:28 PM, Pascal Urien wrote:<br>
&gt; Hi Abhinav<br>
&gt;<br>
&gt; The extra time (2ms/bloc)=C2=A0 comes from the hash procedure (sha1 in=
 the<br>
&gt; example) that works with 64 bytes blocs<br>
&gt;<br>
&gt; Rgs<br>
&gt;<br>
&gt; Pascal<br>
&gt;<br>
&gt; 2016-07-25 12:04 GMT+02:00 Somaraju Abhinav<br>
</span>&gt; &lt;<a href=3D"mailto:abhinav.somaraju@tridonic.com" target=3D"=
_blank">abhinav.somaraju@tridonic.com</a> &lt;mailto:<a href=3D"mailto:abhi=
nav.somaraju@tridonic.com" target=3D"_blank">abhinav.somaraju@tridonic.com<=
/a>&gt;&gt;:<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0Hi Pascal,____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0__ __<br>
<span>&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0Thanks for the information. Could you please explai=
n what is<br>
</span>&gt;=C2=A0 =C2=A0 =C2=A0nb_bloc_512bits?____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0Regards,____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0Abhinav____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0*From:*Ace [mailto:<a href=3D"mailto:ace-bounces@ie=
tf.org" target=3D"_blank">ace-bounces@ietf.org</a><br>
&gt;=C2=A0 =C2=A0 =C2=A0&lt;mailto:<a href=3D"mailto:ace-bounces@ietf.org" =
target=3D"_blank">ace-bounces@ietf.org</a>&gt;] *On Behalf Of *Pascal Urien=
<br>
&gt;=C2=A0 =C2=A0 =C2=A0*Sent:* Sonntag, 24. Juli 2016 11:51<br>
&gt;=C2=A0 =C2=A0 =C2=A0*To:* Michael StJohns &lt;<a href=3D"mailto:mstjohn=
s@comcast.net" target=3D"_blank">mstjohns@comcast.net</a><br>
&gt;=C2=A0 =C2=A0 =C2=A0&lt;mailto:<a href=3D"mailto:mstjohns@comcast.net" =
target=3D"_blank">mstjohns@comcast.net</a>&gt;&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0*Cc:* <a href=3D"mailto:ace@ietf.org" target=3D"_bl=
ank">ace@ietf.org</a> &lt;mailto:<a href=3D"mailto:ace@ietf.org" target=3D"=
_blank">ace@ietf.org</a>&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0*Subject:* Re: [Ace] on signature verification time=
s for sec192r1____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0I fully agree...____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0J3A081M=C2=A0 can be found at 10$ over the WEB____<=
br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0__ __<br>
<span>&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0Futhermore this class of cheap device can process T=
LS or DTLS as<br>
</span>&gt;=C2=A0 =C2=A0 =C2=A0illustrated in____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0<a href=3D"https://tools.ietf.org/html/draft-urien-=
uta-tls-dtls-security-module-00____" rel=3D"noreferrer" target=3D"_blank">h=
ttps://tools.ietf.org/html/draft-urien-uta-tls-dtls-security-module-00____<=
/a><br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0They could be used for numerous applications in the=
 IoT____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0Rgs____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0Pascal____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0__ __<br>
<span>&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A02016-07-23 23:59 GMT+02:00 Michael StJohns &lt;<a h=
ref=3D"mailto:mstjohns@comcast.net" target=3D"_blank">mstjohns@comcast.net<=
/a><br>
</span>&gt;=C2=A0 =C2=A0 =C2=A0&lt;mailto:<a href=3D"mailto:mstjohns@comcas=
t.net" target=3D"_blank">mstjohns@comcast.net</a>&gt;&gt;:____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0On 7/23/2016 11:10 AM, Pascal Urien w=
rote:____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0Hi All____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0J3A081M is a javacard d=
evice from NXP____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0__ __<br>
<span>&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0The micocontroller shou=
ld be the P5CD081V1A, which comprises<br>
</span>&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0a crypto process=
or____<br>
<span>&gt;<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0There&#39;s a number of these from a =
number of vendors.=C2=A0 I&#39;d<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0actually look at the A7xxx series of =
chips as they&#39;re designed<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0to be embeddable.=C2=A0 I&#39;ve beco=
me a big fan of javacard style<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0solutions over the years.<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0In any event, the number of relativel=
y inexpensive public key<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0crypto accelerator chips (e.g. googl =
for &quot;secure authentication<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0chips&quot;) is greater than zero and=
 continues to climb.=C2=A0 And for<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0not a lot of money.=C2=A0 Estimating =
what from prices on Digikey, I&#39;d<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0think something less than $.50 for Qu=
antity large as of today<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0and half that or less in 1-2 years as=
 its gets bundled into the<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0&quot;Swiss Army Knife&quot; style of=
 process (e.g. support for wireless<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0900mhz plus ... plus ... plus ... plu=
s security...) (google for<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0iot module secure element 900mhz for =
example).<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0Later, Mike<br>
&gt;<br>
&gt;<br>
&gt;<br>
&gt;<br>
</span>&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0__ __<br>
<span>&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0The performances with t=
he curve secp192r1 are the following<br>
</span>&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0(for ECDSA + SHA=
1)____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0Sign=C2=A0 =C2=A0 =3D 4=
0ms +=C2=A0 nb_bloc_512bits x 3.5 ms____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0Verify=C2=A0 =3D 60ms=
=C2=A0 + nb_bloc_512bits x 3,5 ms____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0__ __<br>
<span>&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0By the way this chip ha=
s enough crypto ressouces for<br>
</span>&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0processing TLS o=
r DTLS____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0Rgs____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0Pascal____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0__ __<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0_______________________=
____________________________<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0Ace mailing list____<br=
>
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&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0<a href=3D"mailto:Ace@i=
etf.org" target=3D"_blank">Ace@ietf.org</a> &lt;mailto:<a href=3D"mailto:Ac=
e@ietf.org" target=3D"_blank">Ace@ietf.org</a>&gt;____<br>
&gt;<br>
&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0<a href=3D"https://www.=
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&gt;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0_____________________________________=
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&gt;=C2=A0 =C2=A0 =C2=A0___________________________________________________=
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</span><div><div>&gt; _______________________________________________<br>
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</div></div></blockquote></div></div></div><br></div></div>
</blockquote></div><br></div>

--001a113ddd829f8eb70538c66ccb--

