Re: [CFRG] Threshold Sig required - Random bit flip hits Cert Transparency Log

Tim Dierks <tim@dierks.org> Thu, 08 July 2021 15:21 UTC

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From: Tim Dierks <tim@dierks.org>
Date: Thu, 8 Jul 2021 11:21:10 -0400
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To: Phillip Hallam-Baker <phill@hallambaker.com>
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Subject: Re: [CFRG] Threshold Sig required - Random bit flip hits Cert Transparency Log
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On Thu, Jul 8, 2021 at 12:54 AM Phillip Hallam-Baker <phill@hallambaker.com>
wrote:

> If you have a single CPU, you will always have the possibility of an
> error. Not all faults are transient. If the data was corrupted in
> the cache, it is going to be corrupted both times it is hashed. And
> optimizing compilers can screw you in really imaginative ways.
>

We will always have errors, that's the reason we have to take care. But I
believe that errors like this can be detected and prevented from being
committed/released using relatively straightforward redundant checks as
illustrated. If you can identify in the flow described where a bit error
could occur without detection, I'd be interested to know; we're protecting
a lot of data using similar designs. The failure of a reproducible log is
one thing; I'm very interested in avoiding errors when wrapping keys that
might lead to large quantities of data being unrecoverable if not detected
prior to commit.

 - Tim