Re: [Cfrg] Publicly verifiable benchmarks

Michael Hamburg <mike@shiftleft.org> Mon, 13 October 2014 17:49 UTC

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From: Michael Hamburg <mike@shiftleft.org>
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Date: Mon, 13 Oct 2014 10:49:49 -0700
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To: "D. J. Bernstein" <djb@cr.yp.to>
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Subject: Re: [Cfrg] Publicly verifiable benchmarks
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> On Oct 13, 2014, at 4:36 AM, D. J. Bernstein <djb@cr.yp.to> wrote:

> David Jacobson writes:
>> It would be nice if you tagged implementations (of algorithms where it
>> matters) into according to leakage resistance.
> 
> Yes. Some implementors advertise constant-time software, but right now
> SUPERCOP doesn't provide a structured mechanism for this advertisement.
> One of the difficulties here is that some people are more stringent than
> others in what they mean by "constant time"; I'll write a separate
> message about this.

You used to have int timingattacks(void) { … }.  Or was that just a BATMAN thing?

> 
> Michael Hamburg writes:
>> some of the machines on bench.cr.yp.to have quirks
>> (turboboost, mismatched cycle counter frequency, etc) which can make
>> the data difficult to interpret and reproduce.
> 
> Turbo Boost is noted as "boost" in red (as is Turbo Core), and is also
> easy to spot as unusually large gaps between the quartiles. See, e.g.,
> http://bench.cr.yp.to/results-dh.html#amd64-hydra3.
> 
> The SUPERCOP documentation has a "Reducing randomness in benchmarks"
> section that tells people how to turn off hyperthreading and Turbo
> Boost. Eventually we'd like to measure what the actual Turbo Boost
> speedup is, but this isn't as easy as it sounds.

It sure doesn’t sound easy.

> Some CPUs don't give the OS full control over clock frequencies. Of
> course, clock frequency makes far less of a difference in cycle counts
> than it makes in other metrics such as operations per second, but it
> does sometimes make a noticeable difference, especially for code that
> doesn't fit into L1 cache.

At least on Intel CPUs, the counter read by RDTSC runs at a constant rate which may or may not have anything to do with the CPU’s actual frequency.  So for example, on a Haswell MacBook Air 1.7GHz (boost to 3.3GHz), the counter runs at 2.2GHz even when TurboBoost is disabled.  This also means that unless you have privilege to read the pcr cycle counter, boosting does ruin the cycle counts just as much as the ops/second.

In the past I’ve seen data on bench.cr.yp.to which looked like it may have been affected by this problem: it showed reasonable quartiles but noticeably faster or slower speeds across all benchmarks.  But that was some time ago, so maybe it’s gone now.

>  Of course, asm code produces much less variability.


That’s a good point.  The downside is that you have to target a specific architecture (eg choose for each directory what vector support you have), but that’s no different from what most library packagers do.

Cheers,
— Mike