Re: [Cfrg] Hardware requirements for elliptic curves

Torsten Schuetze <> Thu, 11 September 2014 08:51 UTC

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Date: Thu, 11 Sep 2014 10:51:04 +0200
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Subject: Re: [Cfrg] Hardware requirements for elliptic curves
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On 06/09/2014 15:52:54 +0100, Alyssa Rowan <akr at> wrote:

> On 05/09/2014 12:34, Johannes Merkle wrote:
>> What I understood is that [hardware vendors] do not want to
>> specialize their hardware to minimize their investment while being
>>  fully flexible (algorithm agile). [...] Furthermore, I guess that
>> new implementations can be built easier based on existing ones.
> Quite. For decades, many vendors of cryptoprocessors have been basing
> their implementations almost directly on existing ones with very few,
> extremely conservative changes, presumably minimising their investment
> by reusing as much as possible.
> Respectfully, I do not think that conservative approach delivers
> sufficient assurance where the integrity of the base is properly in
> question: you don't add a conservatory to fix uncertain foundations.

Respectfully, could you please elaborate on what is an uncertain
foundation with a general modular multiplier that computes

Z=M*C mod N

for general modulus structure of N and arbitrary multiplier M and
multiplicand C?

> While some existing hardware could indeed be adapted, whether abusing
> the RSA multiplier where possible or (more likely, I feel) implementing
> it entirely in firmware, I suggest those seeking these recommendations
> for new elliptic curves, via an open process like this, should also have
> plenty of concerns about crypto implementations presented as a closed
> "black box" with an uncertain pedigree which has not also been designed,
> audited, and certified as openly as possible from its inception. Rusty,
> closed crypto hardware with new paintwork is, I feel, unlikely to meet
> those needs.

Only the multiplier is in hardware. ECC on smart cards is usually done
in firmware, as you call it. Companies like Gemalto or Giesecke &
Devrient do this regularly, if you don't trust the hardware vendor like
NXP, Samsung, Infineon, etc.

What do you mean with "an uncertain pedigree which has not also been
designed, audited, and certified as openly as possible from its
inception"? Smart cards, i.e., its coprocessors and its ECC software
implementations, are always certified by Common Criteria, usually with
rather high assurance level. Don't you trust this certification in
principle? Shall everything be open-source? Do you trust your compiler
when compiling your specialized highly-optimized elliptic curve
arithmetic? Or do you perform a formal verification before hand? Do
you trust your Intel processor?

> I'm not aware of any cryptoprocessor vendor who has shipped any new
> hardware like that, but I would heartily welcome and encourage it.

As I have said, they do this regularly, i.e., ship "new" hardware that
has been evaluated and certified by defined processes.

By the way, in a mail from Sep 02 you wrote "I think it would be a
mistake to allow old hardware implementations to (yet again)
needlessly overshadow improved software ones"

Only the multiplier is in hardware, everything else is in
software/firmware. What is old hardware for you? Do you know the
product and development cycles/costs for ASICs/smart cards? We do not
want and we will not design a new public-key coprocessor, a new RNG, a
new symmetric coprocessor, a new memory encryption unit, etc. every
new year. Besides that, the software on the smart cards has much
shorter cycles. For example, the German scheme for qualified digital
signatures, the highest security requirements in the public sector,
has cycle times about 7-8 years, i.e., 2-3 years development and
evaluation, 5 years in the field.

> I gather a few efforts are under way from private teams, as has been
> previously discussed.

We as high-security/hardware crypto community certainly welcome new
ideas. Competition is always good for security.

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