Re: [MBONED] draft-ietf-mboned-64-multicast-address-format-03.txt

Jacni Qin <jacni@jacni.com> Thu, 23 August 2012 04:07 UTC

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Message-ID: <5035AC65.4060301@jacni.com>
Date: Thu, 23 Aug 2012 12:07:01 +0800
From: Jacni Qin <jacni@jacni.com>
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To: Tim Chown <tjc@ecs.soton.ac.uk>
References: <E3FAB1F4F41F3A45B287E8D9C53522FD379D374F@PACDCEXMB05.cable.comcast.com> <502AFECA.1090905@venaas.com> <2B337C44-D16B-49BD-9347-901F6107A239@ecs.soton.ac.uk> <EMEW3|1c3fd9d33484c5343b2d7337b5211574o7G0Be03tjc|ecs.soton.ac.uk|2B337C44-D16B-49BD-9347-901F6107A239@ecs.soton.ac.uk> <502E8819.5030901@venaas.com> <CAC8QAccRXZW=TUw3-6NSrOVy+t-iv9aqBGHzSP3tQw9_LD_S5g@mail.gmail.com> <502EA087.2050803@venaas.com> <CAC8QAccswaS3cTqAdoEUzb4hnFO+qd=cx71k5mdsbo5GJNx6LA@mail.gmail.com> <E3E93136-7F2F-40B8-BC3B-CA7C9DC25F42@ecs.soton.ac.uk> <EMEW3|b1f060ff67b81d8a57bf37f9620b398co7JNdl03tjc|ecs.soton.ac.uk|E3E93136-7F2F-40B8-BC3B-CA7C9DC25F42@ecs.soton.ac.uk> <5032F585.2000607@jacni.com> <C01BCCDC-7BE5-40FF-850E-6922E990E5B3@ecs.soton.ac.uk> <EMEW3|9080010046043a3b61cd9da8e6360ea9o7KH9I03tjc|ecs.soton.ac.uk|C01BCCDC-7BE5-40FF-850E-6922E990E5B3@ecs.soton.ac.uk>
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Cc: mboned@ietf.org
Subject: Re: [MBONED] draft-ietf-mboned-64-multicast-address-format-03.txt
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On 8/22/2012 Wednesday 12:09 AM, Tim Chown wrote:
> On 21 Aug 2012, at 03:42, Jacni Qin <jacni@jacni.com 
> <mailto:jacni@jacni.com>> wrote:
>
>> Hi Tim,
>>
>> On 8/21/2012 Tuesday 6:39 AM, Tim Chown wrote:
>>> I think the same applies to RFcC3956 too, as bits 17-20 are reserved, and you're using those.  Actually also nteresting to read Appendix A of that RFC ;)
>> I guess we won't need a "RFC3956 updated", since Appendix A just says, "
>>     Instead of using flags bits ("FF70::/12"), one could have used the
>>     leftmost reserved bits instead ("FF3x:8000::/17").
>> "
>> and doesn't say anything about the 4bit rsvd elsewhere.
>>
>> Or I misunderstand it?
>
> I'm not sure what the proper process is here.  My point was just that 
> RFC3956 states that bits 17-20 are reserved,
The 3956 doesn't really make that statement on the 4 bits itself, 
instead, more like inheriting from 3306.
While I don't think this issue matters that much technically, we can 
follow a proper process if anyone have one.

> but the proposed range of addresses used by this draft involves 
> setting a bit within that range, hence we should have an "updated by" 
> note.  Also that RFC3956, unlike RFC3306, doesn't explicitly say the 
> reserved bits must be set to zero.
>
> The irony of Appendix A of RFC3956 is that it mentioned that one could 
> have used precisely the same range of addresses for Embedded-RP as is 
> proposed for this draft, but instead a flag bit was used.
So, following this logic, we'll be perfectly fine using a flag. ;-)


Cheers,
Jacni

>
> In response to Behcet's email, I agree the update(s) is/are implicit.
>
> Tim
>
>
>
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