Re: RFC 1812, section 4.2.2.5
Tony Li <tli@cisco.com> Sun, 17 September 1995 07:49 UTC
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Date: Sun, 17 Sep 1995 00:23:48 -0700
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From: Tony Li <tli@cisco.com>
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To: billw@cisco.com
Cc: craig@aland.bbn.com, rreq@isi.edu
In-Reply-To: <CMM.0.90.2.811320314.billw@puli.cisco.com>
Subject: Re: RFC 1812, section 4.2.2.5
I find it difficult to believe a 25% performance hit considering the other sanity checks that probably have to be made, but then I've never counted cycles through our fastest single-processor path... I don't know exactly what Craig's working on, but I suspect that it causes him to pull in at least two extra longwords, thus screwing up whatever clever memory controller (or pipeline?) that he's thinking of. Note that if you take interpretation 2, the fast path need only reference the version/IHL byte, the TTL and checksum longword, and the destination address longword. You can ALSO decide that you want to play games with the TOS byte, and still only be referencing 50% of the IP header. And before someone flames me, yes, I realize that conventional memory controllers are pulling in big blocks efficiently. I _assume_ that Craig is doing something more interesting than the conventional. ;-) Tony
- RFC 1812, section 4.2.2.5 Craig Partridge
- Re: RFC 1812, section 4.2.2.5 Fred Baker
- Re: RFC 1812, section 4.2.2.5 Tony Li
- Re: RFC 1812, section 4.2.2.5 Fred Baker
- Re: RFC 1812, section 4.2.2.5 Frank Kastenholz
- Re: RFC 1812, section 4.2.2.5 Frank Kastenholz
- Re: RFC 1812, section 4.2.2.5 John Shriver
- Re: RFC 1812, section 4.2.2.5 Tony Li
- Re: RFC 1812, section 4.2.2.5 Noel Chiappa
- Re: RFC 1812, section 4.2.2.5 William Chops Westfield
- Re: RFC 1812, section 4.2.2.5 Tony Li
- Re: RFC 1812, section 4.2.2.5 braden