[Rtg-dt-encap-considerations] Header alignment in encapsulation

Tom Herbert <tom@herbertland.com> Wed, 03 February 2016 19:41 UTC

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Date: Wed, 3 Feb 2016 11:41:17 -0800
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From: Tom Herbert <tom@herbertland.com>
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Subject: [Rtg-dt-encap-considerations] Header alignment in encapsulation
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Hello,

It turns out that there are still CPU architectures that have
difficulty with unaligned accesses (notably Sparc). Nearly all IP
protocols are careful to be 4-byte aligned, but we get into trouble
when Ethernet (14 byte hdr.) gets involved. Typically, we pad RX
Ethernet buffers with two bytes so that the Ethernet payload (e.g. and
IP packet) is 4-byte aligned.

Encapsulations that carry Ethernet are still problematic, the inner
and outer IP headers can have different alignments. EtherIP is okay
since it inserts a two byte header, but GRE-TEB, VXLAN allow the
different alignments (and I believe Geneve and VXLAN-GPE will also).

I suggest we should add as recommendation to the encap considerations
that protocols should maintain 4-byte alignment of encapsulated IP
packets. For instance when encapsulating Ethernet the two bytes should
be inserted like in EtherIP to align the payload with the outer
headers.

Thanks,
Tom