[trill] corrections ->draft-ietf-trill-fine-labeling-03

[gayle noble <[e-mail]>]

(in my opinion) grammatical and spelling corrections to corrections draft-ietf-trill-fine-labeling-03

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1.1 Terminology (page 3)

  Edge TRILL switch - A TRILL switch announcing VLAN or Fien [Fine]Grained Lab el [Label] interest in its LSP.

 

4. Alternate Priority (page 6)

It would be desirable for an ingress TRILL Switch to be able to assign a different priority to an [a] FGL TRILL Data frame for its ingress-to-egress propagation from the priority of the original native frame.

 

2.4 VL, Limited FGL, and Full FGL TRILL Switches (page 8)

It will be simpler to use the same type of label for all TRILL switche [switches] for this purpose.

 

If a campus is being upgraded from VL [to] FGL TRILL switches, it avoids a requirement to immediately reconfigure all ports with FGL configuration.

 

As discussed in Section 4, VL TRILL switches conformant to [RFC6325] should discard an [a] FGL TRILL Data frame as malformed.

 

3. VL versus FGL Label Differences (page 10)

With FGL TRILL switches, many things remain the same because an [a]FGL can appear only as the Inner.Label inside a TRILL Data frame.

 

Thus, for ports configured for FGL, the native frame C-VLAN on one link corresponding to an [a] FGL can be different from the native frame C-VLAN corresponding to that same FGL on a different link elsewhere in the campus or even a different link attached to the same TRILL switch

 

4.2 FGL and VL Mixed Campus Characteristics (page 12)

The [There] are possible future extensions to TRILL that would eliminate the requirement to block TRILL Data traffic between FGL and VL TRILL switches improving backwards compatibility.

 

5.1 Ingress Processing (page 14)

Thus Full FGL TRILL switches MUST support configurable per port mapping from the C-VLAN of a native frame, as reported by the ingress port, to an [a]FGL.

5.2.2 Multi-Destination Transit Processing (page 15)

Multi-destination TRILL Data frames are forwarded on a distribution tree selected by the ingress TRILL switch except that an [a] FGL ingress TRILL switch may TRILL unicast such a frame to all relevant egress TRILL switches as described in Section 5.1.

 

An [A] FGL TRILL switch, say RB1, having an [a] FGL multi-destination frame for label (X.Y) to forward on a distribution tree, SHOULD prune that tree based on whether there are any edge TRILL switches on a tree branch that are advertising connectivity to label (X.Y).

 

5.3 Egress Processing (page 16)

 

A Full FGL TRILL switch MUST be able to configurably [be configured to] convert the FGL in an FGL TRILL Data frame it is egressing to a C-VLAN ID for the resulting native frame on a per port basis.

 

An [A] FGL TRILL switch egresses FGL frames similarly to the egressing of VL frames, as follows:

 

If there are no such ports, it is flooded out all FGL ports that have its FGL except any ports that for which the TRILL switch has knowledge    that the frame's Inner.MacDA cannot be [go] out that port.

 

An [A] FGL TRILL switch, including a Limited FGL TRILL switch that might have limited knowledge of FGL formats, MUST NOT egress an [a] FGL frame with label (X.Y) to any port not configured with that label even if the port is configured to egress VL frames in VLAN X.

 

5.5 Address Learning (page 17)

An [A] FGL TRILL switch learns addresses on ports configured for FGL based on the fine-grained label rather than the native frame's VLAN.

 

(page 22)

As a result, no TRILL data frames can be exchanged between VL and FGL TRILL switches and they will be isolated form [from] each other for data purposes.