Re: [Tsv-art] Tsvart last call review of draft-ietf-v6ops-ipv6-ehs-packet-drops-05

Nick Hilliard <nick@foobar.org> Sat, 20 February 2021 12:59 UTC

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From: Nick Hilliard <nick@foobar.org>
To: Gorry Fairhurst <gorry@erg.abdn.ac.uk>
Cc: tsv-art@ietf.org, draft-ietf-v6ops-ipv6-ehs-packet-drops.all@ietf.org, last-call@ietf.org, v6ops@ietf.org
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Date: Sat, 20 Feb 2021 12:59:07 +0000
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Subject: Re: [Tsv-art] Tsvart last call review of draft-ietf-v6ops-ipv6-ehs-packet-drops-05
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Hi Gorry,

Gorry Fairhurst via Datatracker wrote on 18/02/2021 16:54:
> * I suggest a more powerful chip design might not have reduced performance, but 
>
> would cost more: /but the overall performance of the system will be reduced. / 
>
> - so maybe either performance is reduced or the system cost increased?

The practical issue here is that on all hardware, if you increase the 
complexity of a pipeline, the performance will be reduced.  This is a 
statement of what happens in the real world on installed systems.

The purpose of this ID was to provide an practical overview of the 
real-world problems that operators are likely to experience, and why 
they happen, rather than getting into the thornier issue of analysing 
the what-ifs and wherefores of design choices.  So we deliberately 
steered clear of value judgements, including the trade-offs between 
cost, complexity and performance - there's too much scope in there to 
get lost in the long grass.

Nick