[Gen-art] Gen-ART review of draft-ietf-ospf-rfc4970bis-04

"Romascanu, Dan (Dan)" <dromasca@avaya.com> Thu, 08 October 2015 16:15 UTC

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From: "Romascanu, Dan (Dan)" <dromasca@avaya.com>
To: General Area Review Team <gen-art@ietf.org>
Thread-Topic: Gen-ART review of draft-ietf-ospf-rfc4970bis-04
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Date: Thu, 08 Oct 2015 16:15:51 +0000
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Subject: [Gen-art] Gen-ART review of draft-ietf-ospf-rfc4970bis-04
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I am the assigned Gen-ART reviewer for this draft. The General Area Review Team (Gen-ART) reviews all IETF documents being processed by the IESG for the IETF Chair.  Please treat these comments just like any other last call comments.



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Document: draft-ietf-ospf-rfc4970bis-04

Reviewer: Dan Romascanu

Review Date: 10/8/15

IETF LC End Date: 10/8/15

IESG Telechat date: 10/15/15



Summary:

The document is ready with one issue for clarification and minor editorial observations.



Major issues:

None



Minor issues:



There seems to be an inconsistency between the way padding of the value fields in the value TLVs is defined in section 2.1, and in 2.3 and 2.5 respectively.



In 2.1 we have: 'The padding is composed of zeros'



In 2.2 we have: 'The format of the TLVs within the body of an RI LSA is defined as in Section 2.1' This would include the V (value) field, thus the padding.



However, in 2.3 and 2.5 the definitions of the value fields stipulate they are 'padded with undefined bits'



Why this inconsistency?



Nits/editorial comments:



1.       If the TLV definitions within the body of the RI LSA are identical, it would have been better to separate this in a distinct sub-section.

2.       Please include a reference to the Vendor Enterprise Code in section 5.2