Re: [Cbor] NaN payload notation (Re: 7049bis: Diagnostic notation gaps)

[Thiago Macieira <[e-mail]>]

On Wednesday, 16 September 2020 09:17:23 PDT Carsten Bormann wrote:
> > As for the all-bits-set... I would prefer not to. The current 7049 says
> > that the preferred forms are 7e00, 7fc00000, 7ff8000000000000, which
> > match the quiet NaN that CPUs like x86 generate when they need to create
> > a NaN out of non-NaN parameters. The other way around is important and is
> > detailed on the Intel manual: the SIMD all-bits-set value has the NaN's
> > quiet bit set.
> Some diagnostic notation writers will put out 0xffffffff as NaN (as defined
> in RFC 7049).  Some may make use of new notation we come up with.

It is *a* NaN, but not *the* NaN. That value should produce the letters "NaN" 
somewhere, but it will need more details to disambiguate.

> > Personally, I'd prefer never to generate that. Printing as hexfloat isn't
> > too difficult, so whenever possible I'd like to have my own code do that.
> > For this reason, I'd like an alternative for NaN that has the letters
> > "nan" somewhere in them, so I can see from the dump output that it is a
> > NaN.
> 
> OK, sticking with your proposal:  NaN’7e00’_1 (or maybe NaN’7e00’ as we
> don’t really have leading zero bytes in a NaN?) This of course means
> NaN’7c00’ (or NaN’3c00’) would be invalid, as these are not NaNs.

Indeed. I think that's acceptable as it allows code to detect that the FP 
number is a NaN and then simply dump the entire thing, without having to 
understand which bits are mantissa and which ones aren't.

GCC's intrinsic __builtin_nanf16("0x1") is NaN'7e01', but fortunately it also 
generates the same thing for __builtin_nanf16("0x7e01"). It just masks off the 
high bits, including the sign bit, so to generate NaN'fe00', you'd write 
-_builtin_nanf16("").

To confirm I understand you, are these sequences identical to each other (in 
the same line)?

  NaN_1	NaN'7e00'		NaN
  NaN_2	NaN'7fc00000'
  NaN_3	NaN'7ff8000000000000'

(the bit patterns are the QNaN, unless I made a mistake; I'm not trying to 
trick you)

-- 
Thiago Macieira - thiago.macieira (AT) intel.com
  Software Architect - Intel DPG Cloud Engineering