[Softwires] Excluded ports in draft-ietf-softwire-map-02

[Tom Taylor <[e-mail]>]

draft-ietf-softwire-map-02 mentions excluded ports in several places:

Section 5.1: talks about excluding ports 0-4095. The reason for choosing 
that limit is not given at that point. Further discussion below.

Section 5.1.1 says:

    For a > 0, j MUST be larger than 0.  This ensures that the algorithm
    excludes the system ports ([I-D.ietf-tsvwg-iana-ports]).  For a = 0,
    j MAY be 0 to allow for the provisioning of the system ports.

There is no basis for these statements. The actual requirement to ensure 
exclusion of the system ports is that (j * the block size M*R) is 1024 
or greater for some j in the range 1 .. (2^a - 1). This is always 
satisfied for block sizes up to 32768. However, for block sizes less 
than 1024, exclusion of the system ports requires that j be restricted 
to values 1024/(M*R) or higher. BTW, a block size less than 1024 fits 
into 10 bits or less, implying a >= 6.

With regard to the second statement, it's not clear why system ports can 
be allocated if there is only a single block (a = 0) and not in any 
other case. In fact, if there is a single block, the result of allowing 
system ports to be allocated is that they would all go to one or a few 
CEs with the lowest values of PSID. This is illustrated in the last 
example of Section 5.1.2. In fact, in the single block case, to exclude 
system ports one would exclude the lower values of PSID.

Section 5.1.3 says:

    To simplify the GMA port mapping algorithm the defaults are chosen so
    that the PSID field starts on a nibble boundary and the excluded port
    range (0-1023) is extended to 0-4095.

Now we see the origin of that number 4096 in Section 5.1. However, the 
effect of extending the excluded port range, following the reasoning 
above, is that for block sizes less than 4096, the minimum value of j is 
4096/(M*R). This requires a to be at least 4. The defaults imply a block 
size of 4096 and a minimum j value of 1, giving 15 usable blocks in the 
range 4096-65536.

The parameters identified in Section 5.1.3 are incomplete. They are 
enough to derive the block size M*R and the beginning value of j, but 
not the individual parameters M (maximum consecutive ports per CE) and R 
(number of CEs sharing the same IP address). Without those parameters 
the complete set of port numbers allocated to a given CE cannot be 
calculated. Note that the examples specify R.

Recommendations
===============

Based on the above analysis, I propose the following:

1) When defining the limits for j in section 5.1, use a value of E (for 
lowest permitted port value) in place of 4096. Mention that in the case 
of a single block (M*R >= 32768), j can only have the value zero and to 
exclude port numbers below E one instead excludes PSID values from 0 to
ceil(E/M) - 1.

2) Delete the paragraph cited in Section 5.1.1.

3) Modify the text in Section 5.1.3 as follows:

    ...
    o  Offset bits (a) : 4, implying a block size of 4096.

    This combination of defaults simplifies the GMA port mapping
    algorithm by ensuring that the PSID high-order bit lies on a
    nibble boundary and making the lower limit on the index j equal
    to 1.

Also add the parameter R (say) to the set of provisioned values,
with a suitable default.